Abstract
Vitrimers are a new class of polymeric materials that offer several advantages compared to regular thermosetting materials typically used in electronics packaging. From their reconfigurable network, it is possible to benefit from properties previously reserved to thermoplastics, thus opening new ways to use and process crosslinked materials. For now, vitrimers are mostly explored for structural composites manufacturing, but their use as a packaging material can be valued from reliability, manufacturing and sustainability standpoints.

Bio
Baptiste Arati is a research engineer at the Technological Research Institute Saint-Exupéry (IRT-SE) in Toulouse, France. He received a B.S. degree in materials chemistry and a M.S. degree in materials and structures for aerospace from Paul Sabatier University, Toulouse, France. He then obtained his Ph.D. degree, for his work on self-healing dielectrics for power electronics with the Laplace—Laboratory on Plasma and Energy Conversion and Mitsubishi Electrics R&D Centre Europe (MERCE). His current research is dedicated to the reliability of soldered and embedded electronic components and the development of more sustainable packaging materials.

Abstract
Almost all state-of-the-art semiconductor interconnects use solid metals welded together through thermo, thermo-sonic, ultrasonic, or thermo-compression bonding. These interconnects are degraded by thermo-mechanical stress and are a primary cause of failure in power semiconductor devices. In this work, we replace all solid metal interconnects with liquid metals. The latest results demonstrate a factor of 80x increase in the power cycling lifetime of SiC MOSFET chips when compared to SAC-305 solder and Aluminium wirebonds. The presentation will detail the construction of the liquid metal based SiC MOSFET package, the power cycling and thermal resistance test routines, and estimations for the system level impacts. This may include up to 90% reductions in system weight, and 80% reductions in system cost.

Bio
Dr Nick Baker is an Assistant Professor at the University of Alabama, USA. He achieved an MEng. in Electrical Engineering at Loughborough University, UK, in 2011, and a PhD in Power Electronics at Aalborg University, Denmark, in 2016. Afterwards he worked as Post-Doc before moving to the University of Alabama in 2022. His research interests are reliability, thermal, and materials for power semiconductor device packaging.

Abstract
Sintered copper (Cu) has recently gained traction as a promising bonded material in high-temperature power electronics due to its lower cost and excellent electrical, thermal, and mechanical properties. As Cu is already used in most power modules in the form of a baseplate or as the metallization layer on a substrate, a Cu-based attachment layer inherently reduces the coefficient of thermal expansion mismatch within a power module, thereby improving its reliability and lifetime. This talk will discuss the reliability evaluation efforts on promising bonded materials such as sintered copper and sintered silver conducted at the National Renewable Energy Laboratory.

Bio
Paul Paret leads the computational modeling efforts and thermal characterization of power electronics modules in NREL’s Advanced Power Electronics and Electric Machines (APEEM) group. His work focuses on simulating the thermal and thermomechanical behavior of, and developing lifetime prediction models for, various bonded materials in power electronics packages used in electric-drive vehicles and aviation systems. He is experienced with design optimization studies to improve power electronics package topologies’ power density, efficiency, and reliability under harsh operating conditions.

Abstract
TBC

Bio
Christina DiMarino is an assistant professor in the Bradley Department of Electrical and Computer Engineering at Virginia Tech, and faculty member in the Center for Power Electronics Systems (CPES). She received her M.S. and Ph.D. degrees in electrical engineering from Virginia Tech in 2014 and 2018, respectively. She was a Webber Fellow from 2012 to 2015, and a Rolls-Royce Graduate Fellow from 2016 to 2017. She is located in the Virginia Tech Research Center (VTRC) in Arlington, VA, where she helped establish and manage two new CPES laboratories.

From 2015 to 2018, she was the student membership chair for the IEEE Power Electronics Society (PELS). She is currently a Member-at-Large for the IEEE PELS Administrative Committee, Chair of the PELS Technical Committee 2 on Power Components, Integration, and Power ICs, an Associate Editor for the IEEE Transactions on Power Electronics, and is a member of the IEEE PELS Women in Engineering Committee. She is also on the advisory board for PCIM Europe, the advisor for the IEEE PELS Student Branch Chapter at Virginia Tech, and is a member of the ECE Diversity and Inclusion Committee at Virginia Tech.