Keynote 1, Mar. 1

From System Requirements to High-Power-Density Power Electronics Integration

Prof. Johann W. Kolar
ETH Zurich, Switzerland / TU Wien, Austria

Johann W. Kolar is a Life Fellow of the IEEE, an International Member of the US National Academy of Engineering, and a Fellow of the National Academy of Inventors. He joined the Swiss Federal Institute of Technology (ETH) Zurich in 2001 as the Head of the Power Electronic Systems Laboratory, following 15 years as an international consultant and independent researcher. He has proposed numerous novel converter concepts, including the Vienna Rectifier and the Sparse Matrix Converter. He has published extensively in IEEE conferences and IEEE Transactions and is named as an inventor on numerous granted patents. As a Professor Emeritus (since August 2024), he continues to actively pursue research on ultra-compact and efficient WBG converter systems, AI applications in power electronics, Solid-State Transformers, and the life-cycle analyses of power electronics converter systems.

 Keynote 2, Mar. 3

Prof. Victor Veliadis
North Carolina State University, US

Dr. Victor Veliadis is Executive Director and CTO of PowerAmerica, a Manufacturing USA Institute accelerating SiC and GaN power semiconductor chip and electronics commercialization. At PowerAmerica, he has managed over $150 million across 200+ projects advancing manufacturing and workforce development, and is currently managing a $64M DOE renewal. Prior to joining Power America in 2016, Dr. Veliadis spent 21 years post-Ph.D. in the semiconductor industry, where his work included design, fabrication, and testing of SiC devices, GaN devices for radar systems, and financial and operations management of a commercial semiconductor fab. He is an NC State professor, an IEEE and National Academy of Inventors Fellow, and holds 27 issued U.S. patents, 173 publications, 13 book chapters, and one co-edited book. He has delivered over 250 keynotes and invited presentations.

 Invited talk 1, Mar. 1 

25 Years of Commercial Power Devices Based on SiC – Lessons Learned

Dr. Peter Friedrichs
Infineon Technologies, Germany

Dr. Peter Friedrichs received his Dipl.-Ing. in microelectronics from the Technical University of Bratislava in 1993 and finished his Ph.D thesis at the Fraunhofer Institute FhG-IIS-B in 1997. His focus area of expertise was the physics of the MOS interface in SiC.  In 1996 he joined the Siemens AG and was involved in the development of power devices on SiC like JFETs and power MOSFETs.

Peter joined SiCED GmbH & Co. KG, a company being a joint venture of Siemens and Infineon, on March the 1st, 2000. Since July 2004 he was the managing director of SiCED. In 2009 he achieved the Dipl.-Wirt.-Ing. From the University of Hagen. After the integration of SiCED’s activities into Infineon he joined Infineon Technologies AG on April 1st, 2011 and acts currently as Infineon’s Fellow SiC Innovation & Industrialization.

Peter holds positions as a member of the ECPE board, a member of the ICSCRM steering committee since 2005, Chairman of the JEDEC JC70 committee for wide band gap semiconductors and co-convenor of the IEC TC47 working group for wide band gap power devices. Peter was awarded in 2023 as manager of the year by M&T magazine in the category power electronics. In 2026 he was honored by the election in the ISPSD hall of fame. He holds numerous patents in the area of SiC technology and was invited multiple times for invited and plenary talks at leading power electronics conferences worldwide, and has published more than 150 scientific publications.

Abstract

The history of silicon carbide (SiC) at Infineon – including the very early pioneering research in the Siemens Central R&D and later in the joint venture SiCED – reflects more than three decades of continuous innovation in power semiconductor technology, with packaging developments playing a decisive role in the successful commercialization of SiC devices.

Early SiC activities originated within Siemens in the 1990s, when research programs explored wide-bandgap semiconductors for high-efficiency power conversion. Following the spin-off of Infineon Technologies in 1999, these activities were further expanded in both, the commercialization of Sic Schottky barrier diodes and additional device innovations via the joint work with SiCED .

A major milestone was the worldwide first transition from research to industrial-scale production of SiC power devices in 2001, applying the same quality and reliability standards used for silicon power technologies. This early commitment to manufacturability established the foundation for Infineon’s long-term leadership in SiC power semiconductors. Key for the success was a successful application study proving the revolutionary role of this new technology in highly efficient power supplies.

Later, active devices like JFETs and SiC MOSFET became more and more mature. Especially solar inverters were pioneering use case for such new low loss high voltage transistors.

As SiC devices enabled significantly higher switching frequencies and power densities than silicon, packaging rapidly became a strategic differentiator. The smaller die sizes of SiC chips increased the importance of thermal management and interconnect technologies. One of the most influential innovations was Infineon’s .XT interconnect technology based on diffusion soldering. This packaging innovations accelerated the adoption of SiC technology from industrial niche applications into mass-market sectors such as electric vehicles, renewable energy systems, EV charging infrastructure and industrial drives.

Today, Infineon’s SiC roadmap combines advanced trench MOSFET technology, highly optimized package platforms and large-scale manufacturing. Recent milestones include the ramp-up of 200 mm SiC wafer production and initial promising results regarding the performance of superjunction based transistors.

Overall, the SiC journey from early stage Siemens R&D towards Infineon’s broad product portfolio enabling three digit million dollar revenues right now demonstrates that powerful chip technologies merged with packaging excellence and smart strategic portfolio decisions has been instrumental in unlocking the full potential of silicon carbide power electronics.

Invited talk 2, Mar. 2 

FEM-based Lifetime Modelling: From FitBySim to Physics-based Lifetime Prediction of Power Electronic Modules

Dr. Jürgen Leib
Fraunhofer IISB, Germany

Dr. Jürgen Leib is Head of the Reliability and Testing Group at Fraunhofer IISB in Erlangen, where he leads a team of around 20 scientists and technical staff. His work focuses on lifetime testing, material and failure analysis, and physics-based lifetime modelling of power electronic devices and modules using FEM.

He received his PhD in Physics from the University of Bayreuth in 1997, specialising in solid-state physics at ultra-low temperatures. After an early strategic role at the Research Center Dresden-Rossendorf, he moved to industry in 2001. At SCHOTT Electronic Packaging, he helped develop a novel wafer-level packaging technology from the ground up and established it as an international contract-packaging business, with work spanning Landshut, Japan, and Singapore.

Dr. Leib later co-founded MSG Lithoglas in Berlin and worked as an independent technology consultant in intellectual property and wafer-level technologies across Europe, Singapore, the United Kingdom, and the United States. He joined Fraunhofer IISB in 2017.

He is the author or co-author of numerous publications with more than 750 citations and holds 28 patent families in wafer-level packaging, power-semiconductor testing, and related technologies.

Abstract

The increasing power density, junction temperature, and use of wide-bandgap semiconductors in modern converters demand reliable lifetime prediction for power electronic modules. Conventional qualification commonly relies on accelerated power-cycling tests combined with empirical lifetime models. Such models are efficient and remain important in practice, but their applicability is often limited to the package technologies, load conditions, and failure mechanisms represented in the underlying test database. Extrapolation toward lower temperature swings, complex load sequences, and application-specific mission profiles therefore remains challenging.

This invited talk presents a development path from simulation-supported fitting approaches toward physically motivated FEM-based lifetime prediction (“FitBySim”). The approach combines electro-thermal-mechanical finite-element modelling with power-cycling experiments, thermal calibration, materialography, and damage-based lifetime models. FEM resolves local package loading and degradation indicators—including plastic strain, plastic work, creep deformation, and stress concentration—rather than correlating lifetime solely with externally measured temperature swings.

A SiC power-module demonstrator with silver-sintered chip interconnections and copper buffer structures illustrates this methodology. Power-cycling experiments identify topside sinter-layer degradation as the dominant mechanism, with local metallization delamination and copper-buffer cracking as accompanying effects. FEM simulations calibrated against measured cooling curves reproduce the thermal boundary conditions and locate critical damage regions consistent with the experimental failure analysis. Comparing empirical LESIT fitting, strain- and energy-based power laws, and critical-damage formulations demonstrates both the potential and limitations of conventional FitBySim strategies. In particular, direct power-law models may substantially overestimate lifetime at lower temperature swings because early-cycle material pre-hardening and transient effects are insufficiently represented.

The second part of the talk addresses the transfer of physics-based modelling to realistic mission profiles through machine-learning surrogate models. Full coupled FEM can capture sequence effects, dwell times, and thermal transients, but its computational demand prevents broad application to long drive cycles and design-space studies. A physics-informed two-stage surrogate therefore learns the causal chain from current profile to junction temperature and from temperature history to accumulated solder creep strain. A GRU predicts electro-thermal behaviour, while a temporal convolutional network predicts non-negative incremental creep strain and thus physically consistent damage accumulation. For hybrid and fully unseen automotive mission profiles, surrogate-based lifetime estimates agree with FEM within approximately 1%, while reducing computation from hours to seconds. This enables scalable mission-profile screening, rapid design optimization, and a practical route toward physics-based lifetime prediction of future power electronic modules.

 Invited talk 3, Mar. 2 

Prof. Ivana Kovacevic
ETH Zurich, Switzerland

 Invited talk 4, Mar. 3

Reliability of Advanced Top-Side Contacts for Wide-Bandgap Semiconductors in Power Electronics

Dr. Jacek Rudzki
Semikron Danfoss GmbH, Germany

Jacek Rudzki studied Electronics and Telecommunications Engineering at the Lodz University of Technology (Poland), with a specialization in semiconductor technology and microelectronics. He subsequently earned his Ph.D. from Technische Universität Braunschweig, Germany.

Since joining Danfoss Silicon Power in 2007 (now Semikron Danfoss GmbH), he has led and contributed to numerous research and development projects focused on advanced packaging and interconnection technologies for power electronics. In addition, he serves as a member of the PCIM Conference Advisory Board, where he supports the technical program and contributes to shaping future developments in the field of power electronics.

His current research interests include highly reliable packaging solutions for SiC and GaN power devices, advanced interconnection concepts, failure mechanisms, and lifetime modeling of power electronic modules. Mr. Rudzki is the author and co-author of around 30 patents and more than 40 scientific publications.”

Abstract

Wide-bandgap semiconductors such as SiC enable higher power density, improved efficiency, and higher operating temperatures than conventional silicon devices. However, the increased Young modulus of SiC, thicker chip structures, and higher thermo-mechanical stresses place significant demands on module packaging and interconnection technologies. Achieving the reliability required for traction, industrial, and renewable energy applications therefore requires new approaches for die attach and top-side contacting.

This work investigates the influence of advanced interconnection technologies on the power cycling capability of SiC power modules. Particular attention is given to BondBuffer® technology combined with copper wire bonds and transfer molding. Power cycling tests performed at a junction temperature swing of 110 K and higher peak temperatures demonstrate that molded modules achieve approximately ten times longer lifetime compared with equivalent unmolded assemblies. Detailed failure analysis shows that degradation of the aluminum metallization on the SiC die is the dominant degradation mechanism. The mold compound reduces thermo-mechanical stress and significantly slows the degradation process, resulting in a substantial lifetime improvement. Experimental observations are supported by electro-thermo-mechanical simulations, which indicate considerably lower accumulated plastic strain in molded structures. In addition, the reliability of an all-copper interconnection concept is evaluated. The investigated modules combine copper-metallized SiC MOSFETs, copper wire bonds, and copper-sintered die attachment. Under the same power cycling conditions, no failure criterion was reached during testing. Post-mortem analysis revealed no significant degradation of either the top-side or bottom-side interconnections, demonstrating the excellent robustness of the all-copper approach.

The results show that the selection of interconnection materials and packaging concepts has a decisive impact on power module lifetime. While molded BondBuffer® assemblies already provide a significant reliability improvement over conventional designs, the combination of copper metallization and copper sintering enables an additional increase in robustness. These findings provide important guidance for the development of next-generation SiC power modules targeting demanding long-lifetime applications with operating requirements extending beyond current industry standards.